Title:
CLOCK CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPS6031655
Kind Code:
A
Abstract:
PURPOSE: To attain the clock step operation of the whole system by providing the system with a means uniforming the phase of clocks to be supplied to a data processor.
CONSTITUTION: Outputs from oscillators 1, 10 are supplied to FFs 2, 11 and a clock start/stop control circuit 14. When clock stop is specified by a signal 22, the control circuit 14 stops the FFs 2, 11. When in-phase clocks are specified by a signal line 23, a signal line 25 commands switching circuits 6, 7 so that the outputs of delay lines 12, 13 are outputted to respective signal lines 8, 9. A clock stop signal 24 is controlled so that one clock is generated to the signal lines 8, 9 in the clock stop state.
Inventors:
AKAI TOORU
Application Number:
JP14143383A
Publication Date:
February 18, 1985
Filing Date:
August 01, 1983
Export Citation:
Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F11/22; G06F1/04; (IPC1-7): G06F1/04; G06F11/22
Attorney, Agent or Firm:
Yutaro Kumagai
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