Title:
PRETREATING METHOD OF ION IMPLANTED SUBSTRATE
Document Type and Number:
Japanese Patent JPS6046022
Kind Code:
A
Abstract:
PURPOSE:To obtain a semiconductor substrate which has uniform impurity distribution over the entire surface by annealing the substrate at a high temperature for a long period before an ion implantation, and then quenching it. CONSTITUTION:An undoped semi-insulating GaAs wafer produced by an LEC method is annealed by an annealing device before an ion implantation. A GaAs wafer 4 and an As unit 5 are sealed in a quartz tube 3. The wafer 4 is covered at both ends with other wafers 6, 6 and sealed to prevent the wafer 4 from being contaminated from an SiO2. After the tube 3 is heated at two temperatures by heaters 7, 8, held at the As side at approx. 620 deg.C and at the GaAs side at 820 deg.C to anneal it for 15hr, the tube 3 is rapidly removed from a furnace, and cooled. An FET is formed on the entire surface of the wafer at an interval of 200mum by implanting Si ions to the wafer. An active layer 12 is obtained by implanting Si ions. Further, the wafer is annealed under An pressure.
Inventors:
NAKAI RIYUUSUKE
TAKEBE TOSHIHIKO
YAMAZAKI HAJIME
TAKEBE TOSHIHIKO
YAMAZAKI HAJIME
Application Number:
JP15426583A
Publication Date:
March 12, 1985
Filing Date:
August 23, 1983
Export Citation:
Assignee:
SUMITOMO ELECTRIC INDUSTRIES
NIPPON TELEGRAPH & TELEPHONE
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H01L21/265; H01L21/322; (IPC1-7): H01L21/265
Domestic Patent References:
| JPS5840818A | 1983-03-09 |
Attorney, Agent or Firm:
Hideki Aoki