PURPOSE: To provide a central processing unit which can have the continuous or discontinuous accesses to a general-purpose ROM or RAM.

CONSTITUTION: When the continuous accesses are applied to an external general- purpose ROM or RAM, the continuous access address data are transferred to a 1st latch circuit 24. Meanwhile the discontinuous access address data are transferred to a 2nd latch circuit 25 with the discontinuous access given to those ROM and RAM. The circuit 24 undergoe the increment through an increment circuit 21. Therefore both continuous and discontinuous access index registers are provided independently of each other. Thus it is not required to save the contents of the index registers for each access. As a result, the processing steps are decreased and the processing speed of a central arithmetic processor is increased.