Title:
【発明の名称】半導体デバイスの製造方法
Document Type and Number:
Japanese Patent JP2608548
Kind Code:
B2
Abstract:
A method for manufacturing a semiconductor device comprising at least a support body (1) and a monocrystalline semiconductor body (6, 7), in which both bodies are provided with at least one flat optically smooth surface obtained by means of bulkreducing polishing (mirror polishing) and at least the semiconductor body (6, 7) is then provided at the optically smooth surface with an electrically insulating layer (4), at least the electrically insulating layer on the semiconductor body being subjected to a bonding activating operation, whereupon both bodies (1;6,7), after their flat surfaces have been cleaned, are contacted with each other in a dust-free atmosphere in order to obtain a rigid mechanical connection, after which they are subjected to a heat treatment of at least 350 °C, whereupon the semi- conductor body (6, 7) is etched to a thin layer (7) having a predetermined value lying between 0.05 and 100 µm.
Inventors:
Yang Hei Suma
Theodorus Martinus Michelson
Jan Albertus Pulse
Theodorus Martinus Michelson
Jan Albertus Pulse
Application Number:
JP13938486A
Publication Date:
May 07, 1997
Filing Date:
June 17, 1986
Export Citation:
Assignee:
Philips Electronics Nemrose Fennaught Shap
International Classes:
H01L27/00; H01L21/02; H01L21/20; H01L21/263; H01L21/3205; H01L21/58; H01L21/76; H01L21/762; H01L21/768; H01L21/822; H01L21/84; H01L23/52; H01L25/065; H01L27/12; (IPC1-7): H01L27/00; H01L21/20; H01L21/768; H01L21/84; H01L27/12
Domestic Patent References:
| JP61183940A | ||||
| JP6095936A | ||||
| JP6050970A | ||||
| JP5118475A |
Attorney, Agent or Firm:
Akihide Sugimura (1 outside)