Title:
【発明の名称】半導体装置の製造方法
Document Type and Number:
Japanese Patent JP3057882
Kind Code:
B2
Abstract:
The invention provides a method of fabricating a semiconductor device by forming, on a P-type silicon substrate, a memory cell portion partitioned with a field oxide film, forming trenches in self-alignment with a polycrystalline silicon film which act as gate electrodes in the semiconductor device, completely burying second and third oxide films in the trenches, removing the third oxide film near the end of the field oxide film by using a second resist film as a mask and thereafter etching-back the whole surface to cause the second and third oxide films to remain only in the trenches. According to the method, the oxide film can be stably buried in the trenches.
Inventors:
Kazuhiro Tasaka
Application Number:
JP5020892A
Publication Date:
July 04, 2000
Filing Date:
March 09, 1992
Export Citation:
Assignee:
NEC
International Classes:
H01L21/76; H01L21/762; (IPC1-7): H01L21/76
Domestic Patent References:
| JP2267963A | ||||
| JP5790940A |
Attorney, Agent or Firm:
Naoki Kyomoto