Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
DROP-OUT COMPENSATOR
Document Type and Number:
Japanese Patent JPH0795537
Kind Code:
A
Abstract:

PURPOSE: To perform satisfactory drop-out compesation while simplifying circuit scale and preventing complement due to continuous reproduced images or unnatural reproduced images with time deviation.

CONSTITUTION: When drop-out is not generated, a switching circuit 22B is changed over to an FM demodulator 20 and the output is supplied to a temporary de-emphasis device 24. When the drop-out is detected, the output of a frame memory 24B is selected at the switching circuit 22B and this output is supplied to the temporary de-emphasis device 24. Namely, the frame memory 24B of the temporary de-emphasis device 24 is used in place of a frame memory used for storing complementary data in the case of drop-out compensation. Therefore, the frame memory on the side of the drop-out compensator is unnecessitated, and the circuit scale is simplified.


Inventors:
HIRAYAMA MAKOTO
Application Number:
JP26190093A
Publication Date:
April 07, 1995
Filing Date:
September 25, 1993
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H04N5/93; G11B20/02; G11B20/06; H04N5/94; (IPC1-7): H04N5/94; G11B20/02; G11B20/06; H04N5/93
Attorney, Agent or Firm:
Kajiwara Yasunori