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Title:
DEVICE FOR REDUCING POWER CONSUMPTION OF INTEGRATED CIRCUIT MICROPROCESSOR
Document Type and Number:
Japanese Patent JPH0764959
Kind Code:
A
Abstract:

PURPOSE: To provide an integrated circuit power consumption device capable of reducing power consumption without being affected by a program executed in a processor even in the short time of a mechanical language execution level in an integrated circuit microprocessor.

CONSTITUTION: When it is judged that an instruction executing device 14 is in a stand-by state in a stand-by state judging device 10 based on a request signal S102 for requesting a cooperative processing from the instruction executing device 14 to a bus interface device 11 and an acknowledge signal S101 indicating the propriety of accepting the cooperative processing from the bus interface device 11 to the instruction executing device 14, a clock supplying device 12 stops supplying a clock to the instruction executing device 14 by an instruction signal S114 or permits the clock to be a low-speed one.


Inventors:
IZUMIDA MASAMICHI
Application Number:
JP23576993A
Publication Date:
March 10, 1995
Filing Date:
August 28, 1993
Export Citation:
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Assignee:
VM TECHNOLOGY KK
International Classes:
G06F1/04; G06F15/78; (IPC1-7): G06F15/78; G06F1/04
Attorney, Agent or Firm:
Shiro Yokozawa



 
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