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Title:
【発明の名称】ニューロチップおよびそのチップを用いたニューロコンピュータ
Document Type and Number:
Japanese Patent JP3210319
Kind Code:
B2
Abstract:
A neuro-chip comprising a plurality of neuron operation circuits, a broadcast bus terminal for supplying data in parallel to the neuron operation circuits and receiving data in parallel therefrom, a program data bus connected to the neuron operation circuits, a program data bus terminal for supplying a common program externally input, to the neuron operation circuits through the program data bus, a ring bus connecting the neuron operation circuits, and a plurality of ring bus terminals connected to the ring bus, for transferring data among the neuron operation circuits.

Inventors:
Katsuichi Shimokawa
Application Number:
JP4997290A
Publication Date:
September 17, 2001
Filing Date:
March 01, 1990
Export Citation:
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Assignee:
Toshiba Corporation
International Classes:
G06G7/60; G06F15/18; G06N3/063; G06N99/00; G06T1/40; (IPC1-7): G06N3/063
Domestic Patent References:
JP27153A
JP60173659A
Other References:
【文献】NEレポート「5インチ・ウェーハに576ニューロンを集積したニューロLSIを試作」、日経エレクトロニクス、1989年10月2日号(no.483)、p.86-p.87
【文献】「世界で初めて商品化されるニューロチップ」、日経マイクロデバイス、1989年3月、p.123-p.129
【文献】F.Blayo,P.Marchal,”EXTENSION OF CELLULAR AUTOMATA TO NEURAL COMPUTATION”,International Joint Conference on Neural Networks(IJCNN)1989 II,p.II-197-P.II-204(1989)
【文献】T.Watanabe et.al.,”Neural Network Simulation on a Massivery Parallel Cellular Array Processor:AAP-2”,IJCNN 1989 II,p.II-155-p.II-161
Attorney, Agent or Firm:
Takehiko Suzue (3 outside)