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Patent Searching and Data


Title:
SYNCHRONIZING SEPARATOR CIRCUIT
Document Type and Number:
Japanese Patent JPS6020682
Kind Code:
A
Abstract:

PURPOSE: To prevent the occurrence of omission of a color difference signal and the deviation in color by generating a pulse for separating a time axis compression color difference signal and a time axis compression color difference signal and a time axis compression luminance signal at an accurate time position.

CONSTITUTION: A reproduced time division multiple signal is supplied to an automatic gain controlling circuit 40, and the level of a horizontal synchronizing signal is made nearly constant, and supplied to the first and second comparator circuits 41, 42. The comparator circuit 41 detects the level (a) of 1/3 of the horizontal synchronizing signal and applies a reset pulse to a counter 4. From that point of time, the counter 43 counts a clock pulse of fixed frequency and supplies the counted value to an adder 44. A constant corresponding to a time A stored beforehand in an ROM45 is supplied to the adder 45, and the sum of this constant and the counted value of the counter 43 is supplied to a count down counter 46. The comparator 42 detect the level (b) of 2/3 of the horizontal synchronizing signal, and supplies a pulse to the count down counter 46, and loads data of the adder 44. The pulse is generated when the counted value of the count down counter 46 is zero.


Inventors:
HIRAKURI SEISUKE
Application Number:
JP12822183A
Publication Date:
February 01, 1985
Filing Date:
July 14, 1983
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H04N5/08; H04N9/81; (IPC1-7): H04N9/81