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Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE AND LEAD FRAME USING IN MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPS5919364
Kind Code:
A
Abstract:

PURPOSE: To reduce the number of steps of and the cost of a semiconductor device by forming a solder layer which has a lower layer of lead and an upper layer of tin on the surface of the lead part which is projected from a resin package of a lead frame before mounting an element.

CONSTITUTION: A silver plating film 6 is covered on an element mount 4 of a lead frame having a lead 1, a frame piece 2, a dam piece 3, and a wire connecting part 5, and a solder forming layer which has a lower layer 7 of lead and an upper layer 8 of tin is formed on the lead part from the piece 3 to the piece 2. Then, an element 10 is secured to the mount 4, and the electrode of the element 10 and the end of the lead 1 at both sides are connected by wirings 11. Subsequently, a resin package is covered on the part disposed with the mount 4, the connecting part 5, the element 10 and the wirings 11, and the pieces 3, 2 are cut and removed.


Inventors:
ENOMOTO USUKE
HATORI KAZUO
Application Number:
JP12754682A
Publication Date:
January 31, 1984
Filing Date:
July 23, 1982
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L23/48; H01L23/28; H01L23/495; (IPC1-7): H01L21/56; H01L23/48
Attorney, Agent or Firm:
Toshiyuki Usuda



 
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