Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5913322
Kind Code:
A
Abstract:
PURPOSE:To make it possible to eliminate any adverse effect due to an abnormal diffusion of an N-type impurity, by eliminating a part in an N-type semiconductor substrate which is produced by an abnormal diffusion of phosphorus by means of chemical etching or mechanical lapping, and then diffusing a gallium impurity to form a P<+> layer. CONSTITUTION:After an oxide film (SiO2 film) 25 on the upper side is removed, a local phosphorus abnormally diffused part is removed. Successively, gallium is diffused to form thin P<+> layers 26, 27 on both surfaces. After an SiO2 film 28 on one surface (the upper surface) of the P<+> layer 26 is locally removed, a phosphorus impurity is selectively diffused to form a relatively thin N<+> layer 30. Successively, the N<+> layer 30 is enlarged, and diffusion is carried out. Then, a gallium impurity is diffused into the other surface (the lower surface) to form a P<+> layer 31, thereby to form a thyristor element with P<+>N<+>NP<+>N<+> structure.
Inventors:
SUZUKI TAKESHI
SAKURABA SHIGEKI
AKABANE KATSUMI
SAKAGAMI TADASHI
SAKURABA SHIGEKI
AKABANE KATSUMI
SAKAGAMI TADASHI
Application Number:
JP12202782A
Publication Date:
January 24, 1984
Filing Date:
July 15, 1982
Export Citation:
Assignee:
HITACHI LTD
International Classes:
H01L21/22; H01L21/223; H01L21/304; H01L21/329; H01L29/74; (IPC1-7): H01L29/74; H01L29/86
Attorney, Agent or Firm:
Michito Hiraki
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