PURPOSE: To attain the control of output phase by varying the rise or fall timing of a timing pulse based on the data of a data register part.

CONSTITUTION: With input of a start signal 21, a clock signal 20 is applied to a small cycle counter 1 for start of counting. Then a signal is delivered from a phase decoder 2 with the prescribed count value. While the contents of a phase data register 10 are decoded by a phase data decoder 11, and one of many timing outputs generated from the decoder 2 is selected by the decoding output of the decoder 11. Then the set phase and the reset phase of the pulse are given to a timing pulse generator 7. With input of a synchronizing signal 23, a large cycle counter 3 starts counting. Then a signal is delivered from the next large cycle decoder 4 in the prescribed timing and applied to the part 7. An AND is obtained at the part 7 between said signal delivered from the decoder 4 and a selected phase signal. Thus a desired pulse is delivered to the outside.