PURPOSE: To ensure an assured phase locking action, by selecting a unit PLL circuit suited to an input data signal by means of plural unit circuits of different systems.

CONSTITUTION: Both an A unit PLL circuit 11 and a B unit PLL circuit 12 perform pull-in actions in response to the input data signals to transmit synchronizing signals to a selector 13. A floppy disk 15a contains a normal revolution detecting hole. A light emitting element 15b is lit up, and the light quantity is detected by a photodetector 15c for each revolution of the disk. Then a detecting pulse signal is transmitted to a counter 14 via an amplifier 15d. The counter 14 transmits a counting signal to the selector 13 every times when it counts prescribed values 1Wn. The selector 13 switches and selects the input signals given from the circuit 11 or circuit 12 and transmits a synchronizing signal as a reproduced clock signal. In such a way, it is possible to obtain a means to try repetitively the pull-in actions by means of plural unit PLL circuits. Thus, the mutual compensation of merits and demerits of various systems is ensured to obtain a reproduced clock signal.