PURPOSE: To ease requests to working speed, by controlling the switching of a counter which selects either one of dividing ratios P and P+1 with a counter output of a small dividing ratio and a pulse output of 2 cycle duration.

CONSTITUTION: A counter 1 divides an input signal 100 in response to 1 or 0 of a control signal 700 and with either one of dividing patios P and P+1 and supplies it to the inputs of counters 2 and 3 as well as to a clock terminal CP of the FF5 and 6 respectively. The counters 2 and 3 divide input signals with the dividing ratios A and B (≥A), respectively. The counter 2 delivers 0 after counting A pieces of input signals, controls the counter 1 via a gate 7 and switches the dividing ratio of the counter 1 from (P+1) to P. The counter 3 sets the output of a logical circuit 4 after counting (B-2) pieces of input signals, resets the output of the circuit 4 after counting B pieces of input signals and delivers a pulse of 2 cycle duration. The dividing ratio of the counter 1 is switched from P to P+1 with the output Q1 of the FF5 and via the gate 7, delivers a divided output 500 with the output Q1' and at the same time resets the counters 2 and 3.