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Title:
ALIGNMENT METHOD IN FORMATION OF SOI STRUCTURE AND CONFIRMATION OF ALIGNMENT
Document Type and Number:
Japanese Patent JPH0621406
Kind Code:
A
Abstract:

PURPOSE: To accurately detect an alignment signal through the use of an adjustment mark and to make the accurate evaluation of a deviation in adjustment possible by performing an alignment through removing the semiconductor part of an adjustment mark part.

CONSTITUTION: First, SOI substrate-forming process I is performed. In the process, a substrate having an SOI structure is obtained by a lamination technique. Then, adjustment for an element isolation pattern is performed by photolithography process II so that resist opening is performed only in an adjustment mark part (alignment mark part) and vernier part. Subsequently, Si etching process III is performed so that the semiconductor part (Si part) of the adjustment mark part (alignment mark part) and vernier part is removed. A resist separation process IV is performed and an alignment using the adjustment mark part and alignment confirmation using the vernier part are performed thereafter. Thus, an alignment signal can be detected accurately by the use of the adjustment mark and the accurate evaluation of a deviation in alignment is made possible.


Inventors:
HASHIMOTO MAKOTO
Application Number:
JP19486192A
Publication Date:
January 28, 1994
Filing Date:
June 29, 1992
Export Citation:
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Assignee:
SONY CORP
International Classes:
H01L21/027; H01L21/02; H01L27/12; (IPC1-7): H01L27/12; H01L21/027
Attorney, Agent or Firm:
Toru Takatsuki