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Title:
SOLID-STATE IMAGE PICKUP DEVICE
Document Type and Number:
Japanese Patent JPS60167581
Kind Code:
A
Abstract:

PURPOSE: To prevent a flicker phenomenon by providing a buffer circuit which makes a vertical scanning line selecting a photodiode being not inserted between plural vertical scanning lines to be selected non-selective faster than those being inserted in a solid-state image pickup element of a two-line simultaneous reading system.

CONSTITUTION: A gate line is turned off previously, which has a coupling capacity only with a single vertical gate line out of two selected vertical gate lines, and a gate line is turned off later, which has a coupling capacity with the two vertical gate lines. For example, after B and C are selected and turned on, and when B is turned off previously and then C off; when B is turned off, a transistor 44 is still under a conducting condition. Therefore, an electric potential Vsc of a photodiode 43 is free from the influence and when a vertical gate line 31 is turned off, the potential only drops due to a coupling capacity Cpc1. Therefore, the Vsc potential fluctuation is equal when a field changes, and C and C are simultaneously selected to be turned off, thereby eliminating the difference in the field fluctuation amount, and causing no flicker.


Inventors:
AOKI MASAKAZU
ANDOU HARUHISA
OOBA SHINYA
TAKEMOTO KAYAO
Application Number:
JP26847084A
Publication Date:
August 30, 1985
Filing Date:
December 21, 1984
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L27/14; H01L27/146; H04N5/335; H04N5/341; H04N5/351; H04N5/357; H04N5/374; (IPC1-7): H01L27/14; H04N5/335
Attorney, Agent or Firm:
Junnosuke Nakamura



 
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