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Title:
INTEGRATED CIRCUIT STRUCTURE
Document Type and Number:
Japanese Patent JPS5835942
Kind Code:
A
Abstract:
An integrated circuit structure having substrate contacts formed as a part of the isolation structure and method for making the same is described. The integrated circuit structure is composed of a monocrystalline silicon body (2, 4) having a pattern of dielectric isolation surrounding regions of the monocrystalline silicon in the body. The dielectric isolation pattern includes a recessed dielectric portion (22, 24) at and just below the surface of the integrated circuit and a deep portion which extends from the side of the recessed dielectric portion opposite to that portion at the surface of said body into the monocrystalline silicon body. A highly doped polycrystalline silicon substrate contact (20) is located within the deep portion of the pattern of isolation. At certain locations the deep portion of the pattern extends to the surface of the silicon body where interconnection metallurgy can electrically contact the polycrystalline silicon so as to form a substrate contact to the bottom of the deep portion of the isolation where the contact electrically connects to the silicon body. Any of a variety of integrated circuit device structures may be incorporated within the monocrystalline silicon regions. These devices include bipolar transistors, field effect transistors, capacitors, diodes, resistors and the like.

Inventors:
RICHIYAADO KAARUTON JIYOI
BAANAADO MAIKERU KEMUREEJI
JIYON RESUTAA MOO FUOOSU
Application Number:
JP9862982A
Publication Date:
March 02, 1983
Filing Date:
June 10, 1982
Export Citation:
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Assignee:
IBM
International Classes:
H01L21/31; H01L21/331; H01L21/74; H01L21/76; H01L21/762; H01L21/763; H01L21/822; H01L27/04; H01L29/73; (IPC1-7): H01L21/76; H01L21/95; H01L29/72
Domestic Patent References:
JPS4939387A1974-04-12
Attorney, Agent or Firm:
Next student Okada



 
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