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Title:
OPERATION PROCESSOR
Document Type and Number:
Japanese Patent JPS585857
Kind Code:
A
Abstract:

PURPOSE: To prevent system down by checking whether a fault is generated in an added exclusive floating-point operating device or not at the initial recognition of the system and, if any fault is detected, executing only by a CPU floating-point operation.

CONSTITUTION: When initialization is started, whether each microinstruction is executed based upon its definition or not is checked. If any fault is detected, whether the fault is generated in a floating-point operating device 20 or not is checked. When the fault is generated in the device 20, operands are exchanged between a main storage device 3 and registers 1611, 1612 in a general purpose operating device 16, and a firmware including a microporgram routine for executing the floating-point operation specified for the 2 operands stored in the registers 1611, 1612 is stored in a control storage 11 while the controlling of a general purpose operating circuit 161 in addition.


Inventors:
YOKOYAMA YASUSHI
Application Number:
JP10354081A
Publication Date:
January 13, 1983
Filing Date:
July 02, 1981
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F7/00; G06F11/00; G06F11/16; (IPC1-7): G06F7/38; G06F11/16
Attorney, Agent or Firm:
Uchihara Shin



 
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