PURPOSE: To prevent erroneous synchronization locking at an erroneous frame synchronization position by forming the frame synchronization detection circuit so that its frame counter is initialized by a signal representing a frame synchronization position in a reception data at all times in the out of synchronism state.

CONSTITUTION: The frame synchronization detection circuit consists of a frame synchronization protection section 10 detecting frame synchronization and out of frame synchronization, a reset circuit 30 giving a load signal to a counter, a comparator section 2 comparing a received frame pulse with a carry signal of a frame counter 20, a counter section 3 counting a coincidence pulse or a noncoincidence pulse outputted from the comparison section 2, and an out of synchronism discrimination section 6 generating a signal representing out of synchronism. In this case, the reset circuit 30 initializes the count of the frame counter at all times with a signal representing frame synchronization position in a received data when the signal is generated in out of synchronism state. Thus, erroneous synchronization locking is prevented and correct synchronization establishment is detected.