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Title:
PATTERN RECOGNIZING DEVICE
Document Type and Number:
Japanese Patent JPS58114176
Kind Code:
A
Abstract:

PURPOSE: To prevent the lowering of the recognition rate even if the size of an input pattern is changed, by detecting the longitudinal size and the lateral size of the inputted pattern and converting addresses of a memory in accordance with size by an address conversion table.

CONSTITUTION: Lateral and longitudinal start addresses and end addresses obtained by a circuit for detecting the size of a pattern are inputted to subtractors 31 and 32 respectively to calculate the lateral size and the longitudinal size of the pattern; and when the size is determined, counters 33 and 34 generate lateral and longitudinal addresses of a normalized memory 35. A lateral address of a video memory corresponding to the lateral address of the memory 35 is generated by use of the subtractor 31, an address conversion table 36, and an adder 37. In the table 36, the lateral size and the value of the counter 33 are used as addresses. Consequently, when the value of the memory 35 is increased successively, contents of a video memory 38 corresponding to the memory 35 are read out. The similar operation is performed in respect to the longitudinal address, and thus, the size of the pattern is normalized.


Inventors:
YAMAMOTO EIICHIROU
SHIYOUYAMA YUKIKAZU
Application Number:
JP21403281A
Publication Date:
July 07, 1983
Filing Date:
December 26, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06V10/32; (IPC1-7): G06K9/36; G06K9/46
Domestic Patent References:
JPS4743454A
JPS55110378A1980-08-25
Attorney, Agent or Firm:
Sadaichi Igita



 
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