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Title:
SOLID-STATE IMAGE PICKUP DEVICE
Document Type and Number:
Japanese Patent JPS58137371
Kind Code:
A
Abstract:

PURPOSE: To obtain a vertical contour signal without using a 1H (one horizontal scanning period) delay circuit, by summing up addition and subtraction outputs of signals for two lines, and thus generating a video signal.

CONSTITUTION: The solid-state image pickup element constituted by arraying plural photodetecting elements in two dimensions is read by two lines at a time through a vertical shift register 51, horizontal shift register 52, horizontal switching transistors 53 and 54, and horizontal scanning line selecting circuit 58. Signals for two lines are supplied to an adding circuit 61 for addition and to a subtracting circuit 62 for subtraction. The outputs of the adding circuit 61 and subtracting circuit 62 after being level-set by a level setter 59 are summed up by an adding circuit 63.


Inventors:
TAKAHASHI KENJI
NAGAHARA SHIYUUSAKU
OZAWA NAOKI
KUDOU KOUJI
HIRANO MUTSUFUSA
Application Number:
JP1879382A
Publication Date:
August 15, 1983
Filing Date:
February 10, 1982
Export Citation:
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Assignee:
HITACHI LTD
HITACHI ELECTRONICS
International Classes:
H04N5/335; H04N5/341; H04N5/372; H04N5/374; (IPC1-7): H04N5/30
Attorney, Agent or Firm:
Toshiyuki Usuda



 
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