PURPOSE: To prevent a missing signal in a shift register and reduction in the S/N of the signal in compressing the time axis by adding a switch forming a feedback loop.

CONSTITUTION: A switch 17 is added between a buffer amplifier 8 to which a color difference signal B-Y is applied and a shift register 9. Then an output signal of a buffer amplifier 10 connected to the shift register 9 is fed back to the shift register 9 by a feedback loop formed by the switch 17. Further, a color difference signal R-Y is given to a shift register 3 via a buffer amplifier 2, and its output is given to a switch 5 via a buffer amplifier 4. Moreover, the shift registers 3, 9 are controlled by a clock signal from a clock generating circuit 11. Since the time axis compressing circuit is formed in this way, the missing of the signal in the shift register and the reduction in the S/N of the signal are prevented in compressing the time axis.