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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS59114873
Kind Code:
A
Abstract:

PURPOSE: To largely improve the withstand voltage of a GaAsFET by forming a buffer layer using an AlGaAs layer doped with O2 and laminating an active layer composed of GaAs doped with Si thereon.

CONSTITUTION: The buffer layer 2 composed of the AlGaAs layer doped with O2 is formed on a semi-insulation substrate 1 by a molecular ray epitaxial growing method. On the AlGaAs layer 2, the active layer 3 composed of the GaAs doped with Si as an N type impurity is grown. The GaAsFET is completed by forming a gate electrode 4 in Schottky contact with the active layer 3 and a source 5 and a drain electrode 6 in ohmic contact with the active layer 3. The buffer layer can be increased in insulation thereby, therefore the GaAsFET can be more increased in withstand voltage.


Inventors:
SAITOU JIYUNJI
NISHI HIDETOSHI
HIRACHI YASUTAKA
Application Number:
JP22524782A
Publication Date:
July 03, 1984
Filing Date:
December 21, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/812; H01L21/338; H01L29/10; (IPC1-7): H01L29/80
Domestic Patent References:
JPS5595370A1980-07-19
JPS51103783A1976-09-13
Attorney, Agent or Firm:
Koshiro Matsuoka



 
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