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Title:
ORTHOGONAL DETECTING CIRCUIT
Document Type and Number:
Japanese Patent JPS5833305
Kind Code:
A
Abstract:

PURPOSE: To keep the accurate orthogonal property of an orthogonal detecting circuit and to improve the yield of an IC module, by giving the prescribed weighting to one side of the output of the orthogonal detection and then adding this weighted output to the other output of the orthogonal detection.

CONSTITUTION: When the orthogonal degree is set at 90° for an orthogonal detecting circuit 11, the outputs of detectors 1 and 2 are set as X=Ksinθ and Y'= Kcosθ (θ: phase of input signal; K: a constant). If the orthogonal degree has a shift by δ, Y'=Kcos (θ-δ) is satisfied. Then Ksinθ in δ is mixed into Y'. When the values α and β of a coefficient device 8 and a coefficient device 10 are set at - sinδ and 1/cosδ respectively, α is added to Y' by an adder 9 for an output Y of a wave detection output terminal 6 in the direction Y. At the same time, the value β of the unit 10 is multiplied by the output Y. Therefore Y=[Y'+ (-sinX)]×1/cosδ=Kcosθ is satisfied, and the 90° orthogonal value is obtained to an output X of a detection terminal 5 in the direction X. As a result, the variation of a phase shifter 3 is compensated and the yield is greatly improved.


Inventors:
TAKEDA KOUICHIROU
Application Number:
JP13092681A
Publication Date:
February 26, 1983
Filing Date:
August 21, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03D1/00; H04L27/22; H04L27/38; (IPC1-7): H03D1/00
Attorney, Agent or Firm:
Koshiro Matsuoka



 
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