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Patent Searching and Data


Title:
SEMICONDUCTOR RESISTOR
Document Type and Number:
Japanese Patent JPS6012753
Kind Code:
A
Abstract:

PURPOSE: To increase the efficiency of chip area by the operation of either one of resistors even when current turns to either positive or negative by a method wherein two pinching resistors are formed in the surface of the same semiconductor bulk and connected in series, thus taking bias at the middle point which is the connection point.

CONSTITUTION: An n+ type buried layer 7 is diffusion-formed in the surface layer part of a p+ type Si substrate 6, and an n type layer 1 is epitaxially grown over the entire surface including said layer and formed into island form by a p type isolation region 8. Next, a resistance region 2 is diffusion-formed in the layer 2; at this time, widths are kept enlarged at both ends 2a and 2b and at the center 2c in order to take contact. Thereafter, n+ type regions 3a and 3b are diffusion-formed between the end 2a and the center 2c and between the end 2b and the center 2c, respectively; which then connected to the center 2c by means of Al electrodes 10. When the electrodes 4 and 5 thus connected to the ends 2a and 2b are plus and minus, respectively, the pinch resistance R2 is generated on the side of the region 3b. When otherwise, the resistance R1 is generated on the side of the region 3a.


Inventors:
MINAMIMURA EIJI
Application Number:
JP11831083A
Publication Date:
January 23, 1985
Filing Date:
July 01, 1983
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L27/04; H01L21/822; H01L27/08; (IPC1-7): H01L27/04
Attorney, Agent or Firm:
Akio Takahashi