SYNCHRONOUS OPERATING METHOD OF DUPLEX MICROPROCESSOR

Title:

SYNCHRONOUS OPERATING METHOD OF DUPLEX MICROPROCESSOR

Document Type and Number:

Japanese Patent JPS6041163

Kind Code:

A

Abstract:

PURPOSE:To attain the synchronous I/O control of an I/O bus and the synchronous operation of a microprocessor by synchronizing a control signal from external to supply the signal to both microprocessors and using a common clock circuit. CONSTITUTION:The microprocessors 2, 2' are actuated by a clock signal received from the clock circuit 1 and a synchronization control signal received from an external signal synchronization control circuit 6 to access memories 4, 4' and the I/O 5. When information is inputted or outputted to/from the memories 4, 4' and the device 5, the synchronous I/O of the I/O buses 7, 7' and 8, 8' is controlled through an input information collating circuit 32, an output information collating circuit 31, a synchronization circuit 33, etc. Since the synchronous I/O of the I/O buses is controlled by synchronizing the control signals from external to supply to the microprocessors, the duplex microprocessors can be synchronously operated.

Inventors:

ISOGAWA YOUICHI

Application Number:

JP14934483A

Publication Date:

March 04, 1985

Filing Date:

August 16, 1983

Export Citation:

Click for automatic bibliography generation Help