Title:
SOLID-STATE SCANNING CIRCUIT
Document Type and Number:
Japanese Patent JPS58181321
Kind Code:
A
Abstract:
PURPOSE: To increase the operating margin, by connecting MOS transistors (TRs) for discharge in series with outputs of each stage and switching the TRs with a transmission pulse in the same stage.
CONSTITUTION: Clock pulses 1, 2 in two-phase are applied to lines 6, 7. An input pulse is applied to a line 9. TRs QT1, QT2 are MOS TRs for transmission transmitting an output of the pre-stage with a delay, a TRQC is a MOS TR for discharge outputting a scanning pulse, and the TRQD is a discharge MOS TR for discharging a level stored at output terminals O1∼O3 of each stage. The TRQD is switched with a polarity inversion circuit 11 comprising TRs Ql and Qd.
Inventors:
KOIKE NORIO
UMAJI TOORU
TSUKADA TOSHIHISA
UMAJI TOORU
TSUKADA TOSHIHISA
Application Number:
JP6243082A
Publication Date:
October 24, 1983
Filing Date:
April 16, 1982
Export Citation:
Assignee:
HITACHI LTD
International Classes:
G11C19/28; G11C19/00; H01L27/146; H03K5/15; (IPC1-7): G11C19/28; H01L27/14
Attorney, Agent or Firm:
Toshiyuki Usuda