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Title:
FORMING METHOD FOR JUNCTION OF REVERSE CONDUCTING THYRISTOR
Document Type and Number:
Japanese Patent JPS5852873
Kind Code:
A
Abstract:

PURPOSE: To harmonize the turn-off time of a thyristor section and the reverse recovery charge of a diode section by approximately equalizing the thickness of the P+ layer and the N+ layer of the thyristor section and the diode section and increasing the diode section more than the thyristor section in the degree of the turbulence of crystal structure generated in a substrate.

CONSTITUTION: The boron P+ layer 22 of a P type impurity is attached to the surface of a P layer 15' in the surface, to which the diode section 2 and a surface shaping region 4 are intended to be formed, of silicon disks 5. The turbulence of crystal structure to an Ni layer is amplified by forming the P+ layer 22. Gallium or aluminum is diffused, a PE emitter layer 14 is shaped and a process forming a junction is completed, but the relationship of the thickness of each layer is in accordance with approximately the same method as a conventional method. The diode section is more than the thyristor section in the degree of the turbulence of the crystal structure in the Ni layer in the silicon substrate, relationship required for the reverse cnducting thyristor can easily be realized through the thermal diffusion at a time of a life time killer, and an aimed harmonic element can be manufactured.


Inventors:
MURAOKA KIMIHIRO
Application Number:
JP15067281A
Publication Date:
March 29, 1983
Filing Date:
September 25, 1981
Export Citation:
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Assignee:
TOYO ELECTRIC MFG CO LTD
International Classes:
H01L29/74; (IPC1-7): H01L29/74
Domestic Patent References:
JPS5085281A1975-07-09
JPS5444195A1979-04-07
JPS54137287A1979-10-24
JPS5530305A1980-03-04
JPS5151290A1976-05-06
JP39024991A
JPS54126462A1979-10-01
JPS5513930A1980-01-31



 
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