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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS59138380
Kind Code:
A
Abstract:

PURPOSE: To block the transverse directional diffusion advancing downward of a gate from a source and a drain region and then inhibit punch through by boring a groove in the semiconductor layer between the source and the drain regions constituting an FET, and forming a gate electrode therein via an insulation layer.

CONSTITUTION: Thick insulation oxide film 2 serving as the gate region and element isolation regions are formed by selective oxidation on the surface of a semiconductor substrate 1, and the film 2 of the gate region positioned at the center is removed by etching, thus generating the deep groove therein. Next, a thin insulation oxide film 3 for gate is adhered over the entire surface including said groove, and, by being positioned thereon, the gate electrode 4 composed of polycrystalline Si is formed on the groove. Thereafter, impurity ions are implanted through the film 3 positioned on both sides of said electrode, and accordingly the source and drain regions 5 are generated on the surface layer of the substrate 1 by self-alignment. Thus, the transverse directional diffusion of the region 5 is blocked, and at the same time the generation of punch through is eliminated.


Inventors:
ABE YOSHIHIRO
Application Number:
JP1226083A
Publication Date:
August 08, 1984
Filing Date:
January 27, 1983
Export Citation:
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Assignee:
CANON KK
International Classes:
H01L21/76; H01L29/78; (IPC1-7): H01L27/12
Attorney, Agent or Firm:
Marushima Giichi



 
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