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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS58115860
Kind Code:
A
Abstract:

PURPOSE: To obtain the high reliable semiconductor device generating no leakage current between a substrate and a bonding pad by a method wherein a polycrystalline silicon semiconductor film having the prescribed pattern is arranged in the lower part region of the bonding pad facing with the pad thereof, and moreover being interposed between insulating films.

CONSTITUTION: A polycrystalline silicon gate electrode 23 is formed by selective patterning on an SiO2 film 22 for gate using the CVD method, the photoetching method, the plasma etching method, etc., and at the same time, the polycrystalline silicon layer 21 is arranged on the SiO2 film 12 for isolation between elements. Moreover arsenic ions are implanted using the gate electrode 23 as the mask to form an N+ type source region 13 and an N+ type drain region 14. Then after a PSG film 11 is formed to be adhered according to the CVD method, windows are opened to obtain connection by wirings of the source region 13 and the drain region 14. Moreover after a metal film of Al is evaporated, the bonding pad 2 of Al is formed selectively using the photoetching method, the plasma etching method, and Al wiring films are formed to obtain connection from the source and the drain. After then, after a PSG film 16 is formed according to the CVD method, a window is opened on the bonding pad 2 according to the photoetching method and the plasma etching method.


Inventors:
SHIRAI KAZUNARI
YABU TAKASHI
Application Number:
JP21163581A
Publication Date:
July 09, 1983
Filing Date:
December 29, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L21/60; H01L29/78; (IPC1-7): H01L21/60
Attorney, Agent or Firm:
Sadaichi Igita



 
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