Title:
DISPLAY UNIT
Document Type and Number:
Japanese Patent JPS6026395
Kind Code:
A
Abstract:
Pixel representations for each of a plurality of superimposed (or splitscreen) display portions are accumulated in a band buffer prior to being transferred to the display. The actual pixel representations are made available to the band buffer from an image memory, with addresses provided by a display list memory.This system mimimizes the need for buffering and high speed storage to service the video, by addressing first the display list memory, then in turn using the content of the display list memory to address the image storage, and then in turn using the content of the image storage as the actual pixel representations for accumulation in the band buffer. Two band buffers operate alternatively. The current band buffer is feeding a band of pixel representations to the video shift register while the next band buffer is accumulating the pixel representations of the subsequent video display band.The band buffer accumulates actual pixel representations equivalent to the related band of the display. The pixel representations sent to the band buffer from image memory are gated by controls which ensure that the proper pixel prevails in the case of a composite display made up of a primary display with a secondary display which might have higher priority, as for example, a text announcement superimposed over a normal entertainment program image.
Inventors:
DEEBITSUDO FUREDERITSUKU BANTS
DEEBII RII MARABII
BOORU NOOMAN SHIYORUTSU
DEEBII RII MARABII
BOORU NOOMAN SHIYORUTSU
Application Number:
JP7766484A
Publication Date:
February 09, 1985
Filing Date:
April 19, 1984
Export Citation:
Assignee:
IBM
International Classes:
G09G5/40; G06T3/00; G09G5/00; G09G5/14; G09G5/42; (IPC1-7): G06F3/14; G06F15/62; G09G1/02; G09G1/06
Attorney, Agent or Firm:
Jiro Yamamoto