Title:
PROGRAMMABLE CONTROLLER
Document Type and Number:
Japanese Patent JPS59106005
Kind Code:
A
Abstract:
PURPOSE:To generate a clock signal having optional cycle and pulse width with a simple clock instruction by providing a prescribed clock set value table in a user program. CONSTITUTION:A clock set value table 5a is allocated to a part of a user program 5. This table 5a is divided to eight areas corresponding to eight clock numbers CLK0-CLK7, and each area is divided to a turn-on time area and a turn-off time area. A clock data area 3a is set in a working memory 3 for the purpose of executing the processing of the clock instruction, and this area 3a is divided to eight areas corresponding to respective clock numbers. By this constitution, a clock signal having optional cycle and pulse width (turn-on time and turn-off time) is generated with the simple clock instruction.
Inventors:
FUKUNAGA NAGAHIRO
Application Number:
JP21668682A
Publication Date:
June 19, 1984
Filing Date:
December 10, 1982
Export Citation:
Assignee:
OMRON TATEISI ELECTRONICS CO
International Classes:
G05B19/05; G05B19/042; (IPC1-7): G05B19/02
Attorney, Agent or Firm:
Shigenori Wada