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Patent Searching and Data


Title:
ASSEMBLING SYSTEM
Document Type and Number:
Japanese Patent JPS613248
Kind Code:
A
Abstract:

PURPOSE: To refer to a macro and an operand in a definition deck without any limitation of their positions by performing macro allocation and reference to other macros and operands in the form of allocation modifiers.

CONSTITUTION: An instruction POINT which performs macro allocation is an assembler instruction and means "Give a pointer name (a) BUILD to the starting address of an area of an NCP assembler 1 where a macroinstruction BUILD is stored." When this instruction executed, the address of a main storage area where the pointer name (a) BUILD and microinstruction BUILD are stored is written in a pointer name and address correspondence table. An instruction & BFR means that data in a storage area named BFRS in a macroinstruction storage area indicated by the pointer (a) BUILD should be stored in a storage area named BFR.


Inventors:
KOBAYASHI TAKESHI
Application Number:
JP12309884A
Publication Date:
January 09, 1986
Filing Date:
June 15, 1984
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F9/45; G06F9/44; (IPC1-7): G06F9/44
Attorney, Agent or Firm:
Kyotani Shiro