PURPOSE: To halve false profile by using a 4-bit ring counter forming a burst signal and signals having phase difference of 0°, 90°, 180° and 270° from a clock signal from a PLL so as to control a demodulating circuit.

CONSTITUTION: A signal from a terminal 1 is applied to a PLL4 through a burst gate 3, the clock signal having a frequency four times a chroma subcarrier frequency is formed and applied to a sampling circuit 2. A signal quantized by an A/D converting circuit 5 is applied to a digital luminance chroma separating circuit 6. The clock signal from the PLL4 is applied to the 4-bit ring counter 8 and the burst signal and the phase signals of 0°, 90°, 180° and 270° are formed and applied to the demodulating circuit 7. The color difference signal from the demodulating circuit and the luminance signal from a separating circuit 6 are applied to a matrix circuit 9, where three primary color signals are formed and applied to a D/A converting circuit 10 (10R∼10B) and an LPF11 (11R∼11B).