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Title:
PRINTED CIRCUIT BOARD SEALED WITH CIRCUIT ELEMENT
Document Type and Number:
Japanese Patent JPS59181650
Kind Code:
A
Abstract:

PURPOSE: To contrive to miniaturize and lighten the weight by enabling to narrow the interval between a printed circuit board and another one by a method wherein a recess or a hole is bored in said board, and a circuit element is sealed therein.

CONSTITUTION: The multilayer printed circuit board 1 should be a board having the arrangement of conductor patterns 1a1W1an at intervals and then fixed with synthetic resin 1b by lamination. A part 1a4W1a6 of the conductor patterns are exposed and arranged on the bottom surface or the side wall surface of the recesses 1c1 and 1c2 provided in the surface of the printed circuit board 1. The circuit elements 2 and 4 and wires 8 in the recesses 1c1 and 1c2 remain therein and are so connected as not to project out of the surface 1d of the printed circuit board 1, and clear or oblique resin material is cast in the recesses 1c1 and 1c2 and then fixed. Circuit component connected to each conductor pattern 1a1, 1a2... can be also arranged by forming recesses in the printed circuit board 1, and also arranged on the surface of said board.


Inventors:
MUROTOMI MASAYOSHI
Application Number:
JP5621183A
Publication Date:
October 16, 1984
Filing Date:
March 31, 1983
Export Citation:
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Assignee:
CANON KK
International Classes:
H05K1/18; H01L23/14; H01L23/28; H01L23/538; H05K1/00; (IPC1-7): H01L23/12; H01L23/28; H05K1/18
Attorney, Agent or Firm:
Marushima Giichi



 
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