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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5830153
Kind Code:
A
Abstract:

PURPOSE: To boost the withstand voltage of gate electrode by a method wherein, when the capacitor electrode is provided on a part of gate oxide film and the surface of this electrode and exposed oxide film is coated with the gate electrode to be the dynamic memory element, the oxide film is successively divided into two parts making the part under the capacitor electrode a bit thicker than the other part.

CONSTITUTION: The thick field oxide film 31 is formed on the periphery of the P- type Si substrate 34 overlaying the P+ type channel cut region 32 and the surface of substrate 34 is coated with the thin first gate oxide film 35. Next the overall surface including said film 35 is laminated with the first N type multicrystal Si layer 36 to be the capacitor electrode 36' later and the SiO2 film 37 then the exposed film 37, layer 36 and film 35 are successively removed by etching utilizing the resist film 38 as a mask leaving the end of layer 36 as the undercut 39. Then the film 38 is removed and the undercut 39 is filled with the SiO2 film 41 while the second gate oxide film 40 thinner than the film 35 is formed on the exposed surface of the substrate 34 connected to the film 35 while the partial surface of the film 40 and the film 37 is coated with the gate electrode 42'.


Inventors:
NISHIMOTO KEIJI
TANAKA SHINPEI
Application Number:
JP12834281A
Publication Date:
February 22, 1983
Filing Date:
August 17, 1981
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L27/10; H01L21/8242; H01L27/108; H01L29/78; (IPC1-7): G11C11/34; H01L27/10; H01L29/78
Attorney, Agent or Firm:
Koshiro Matsuoka