PURPOSE: To obtain a bit line charge-up circuit having a required minimum pulse width without waste of timing by charging up the bit line until a dummy bit line is charged after the bit line is selected based on the charging level of the dummy bit line whose charge-up characteristic is constituted similarly as that of the bit line.

CONSTITUTION: When the device is switched from the standby state to the active state, a signal CE goes to L level, and when an output CD1 of a column decoder goes to H level, the charge-up of the dummy bit line DBL is started by a charge circuit 30 and the level of an output clock 0 of an inverter 70 goes to L level. Then since a p-channel transistor (TR)14 is turned on in the charge circuit 10, the charge-up of the bit line BL1 selected by the signal CD1 is started. When the charging of the bit line BL1 is nearly finished, the charging of the dummy bit line DBL is finished and the output clock 0 of the inverter 70 goes to H level. As a result, the TR14 is turned off in the charging circuit 10 and the charging is finished.