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Title:
SYNCHRONIZING SIGNAL GENERATING CIRCUIT OF IMAGE PICKUP DEVICE
Document Type and Number:
Japanese Patent JPS5840983
Kind Code:
A
Abstract:

PURPOSE: To stabilize a VCO frequency, by subjecting phase detection to an output obtained by frequency-dividing the outputs of the 1st and 2nd oscillators and then applying this output as the control voltage of either one of the two oscillators consisting of the VCO.

CONSTITUTION: An output 2 of the 1st oscillator 1 which has an integer-fold value compared with the horizontal frequency of a TV signal is divided into 1/2 in frequency by a frequency divider. Thus a horizontal clock pulse is generated. On the other hand, the output 2 is divided into 644 parts by a frequency divider 5 and an output 6 is used to the input of one side of a phase detector 7. The 2nd oscillator 8 produces the secondary carrier wave. An output 9 is divided into 1/648 in frequency by a frequency divider 10, and an output 11 is used to the input of the other side of the detector 7. An output 12 is fed to the oscillator 8 in the form of the oscillating frequency control voltage 14 via a low pass filter 13. Thus the oscillating frequency of the oscillator 8 is stabilized.


Inventors:
AYUSAWA IWAO
Application Number:
JP13855381A
Publication Date:
March 10, 1983
Filing Date:
September 04, 1981
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H04N3/14; H04N5/067; H04N5/30; (IPC1-7): H04N5/06
Attorney, Agent or Firm:
Toshiyuki Usuda



 
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