PURPOSE: To prevent the occurrence of such a trouble as a decline in operating speed, deterioration of element characteristics, etc., in an LSI provided with a CMOS logical gate and Bi-CMOS logical gate in a mixed state by providing the first and second power supply wiring systems in the LSI and respectively supplying the first and second power supply voltage to the Bi-CMOS and CMOS logical gates.
CONSTITUTION: A Bi-CMOS logical gate is mainly used for driving signal lines between blocks and a CMOS logical gate is mainly used for driving signal lines in the blocks. Voltage dropping circuits 6 which convert a 5V power supply voltage into a voltage of 3-3.5V are provided in each block 3 between CMOS cell rows 4a and a power supply line 5 adjacent to the cell rows 4a. The power supply voltage 5 from power supply lines 5a and 5b and 0V are supplied to each gate G11, G12,... constituting Bi-CMOS logical gate cell rows 4b. On the other hand, power supply voltages of 4.2V and 0.8V shifted from the lines 5a and 5b by the circuit 6 are supplied to each gate G21, G22,... constituting the gate cell rows 4a.
SHIMIZU TERUHISA
TANBA EISAKU
HITACHI MICROCUMPUTER ENG