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Title:
FIELD EFFECT TRANSISTOR AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPS5946084
Kind Code:
A
Abstract:

PURPOSE: To enable to form easily and moreover having favorable precision double diffusion structure of a field effect transistor by a method wherein an insulating film of fixed breadth is formed on the side wall of a gate electrode, and impurities are implanted using the gate electrode and the insulating film as the mask to form a deep diffusion.

CONSTITUTION: An Si oxide film 2 and the gate electrode 3 are formed perpendicularly on a P type Si substrate 1, and a shallow diffusion layer 5 is formed using the electrode 3 as the mask. An Si oxide film 8 is formed on the whole surface. The film 8 is removed totally according to the physically etching method. Etching thereof has the directional property, and the Si oxide film 8' is adheringly survived on the side wall of the electrode 3. Then As ions, for example, are implanted to the whole surface, and a heat treatment is performed to form the deep diffusion layer 7. Length (Lb-La)/2 of the part of only the layer 5 at this time becomes to an extremely small value, and lengths of a source and a drain formed on both the sides of the electrode 3 are also balanced. As a result, the MOSFET enabled to exhibit high speed performance having minute structure can be obtained.


Inventors:
SATOU SHINICHI
Application Number:
JP15850182A
Publication Date:
March 15, 1984
Filing Date:
September 09, 1982
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L29/78; H01S5/30; (IPC1-7): H01S3/18
Domestic Patent References:
JPS5444482A1979-04-07
Attorney, Agent or Firm:
Shinichi Kusano



 
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