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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
Document Type and Number:
Japanese Patent JPS6110274
Kind Code:
A
Abstract:

PURPOSE: To contrive to improve the high frequency characteristic of transistors by a method wherein an external base layer is formed by thermal diffusion from an Si oxide film containing impurities, and an emitter layer is formed by self- alignment to the external base layer by using each layer laminated for surface protection as a mask.

CONSTITUTION: The P+ type external base layer 16 is formed byh thermal diffusion from the Si oxide film 40 containing impurities. The internal base layer 15 is connected to the external base layer 16. An N+ type emitter layer 17 is formed by self-alignment to the external base layer 16 by using the first contact layer 30, Si oxide film 40, and a nitride film 50 as a mask. The second contact layers 31 are provided between the emitter layer 17 and a collector contact layer 18 and electrodes. Therefore, the reduction of base spread resistance can be contrived because of the access of the base layers 15 and 16 to the emitter layer 17 without contact with each other. Further, the area of the active region can be reduced; accordingly, the improvement in high frequency characteristic of transistors can be contrived.


Inventors:
IIDA SHIROSHI
Application Number:
JP13140984A
Publication Date:
January 17, 1986
Filing Date:
June 25, 1984
Export Citation:
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Assignee:
ROHM KK
International Classes:
H01L29/73; H01L21/331; H01L29/10; H01L29/732; (IPC1-7): H01L29/72
Domestic Patent References:
JPS58216461A1983-12-16
JPS5541737A1980-03-24
JPS5595355A1980-07-19
JPS5470776A1979-06-06
JPS5384688A1978-07-26
Attorney, Agent or Firm:
Koji Onishi