PURPOSE: To operate the integrated circuit even when a low power supply voltage is employed by employing a P-channel MOSFET for a MOSFET driving an output load in the semiconductor integrated circuit device so as to control a gate potential of the said PMOSFET with an N-channel MOSFET.
CONSTITUTION: With a low level voltage fed to an input terminal 4, a 1st NMOS 106 is conductive. Then a gate potential of a 2nd PMOS 108 is decreased to a ground potential to make the PMOS 108 conductive and the PMOS 108 drives a load connecting to an output terminal 5. The logic threshold level of this circuit depends on a transfer conductance ratio of PMOS 104, 108 even when the transfer conductance of the PMOS 108 is selected to be almost equal to that of an NPN bipolar TR. Thus, the load connecting to an output terminal 5 is driven at a high speed by selecting only the transfer conductance of the PMOS 108 larger. Thus, the circuit with less load dependency of the circuit operating speed is formed without changing the logic threshold voltage.
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WATANABE TOKUO
HITACHI HARAMACHI SEMI CONDUCT