PURPOSE: To attain parallel transfer of two data by selectively outputting either one of the 1st bit string to be the decoded result of a register address and the 2nd bit string obtained by shifting the 1st bit string only by one bit.

CONSTITUTION: In the case of accessing two registers in parallel at the time of executing a high function instruction, a decided result is shifted to the upper side only by one bit and the shifted result is outputted to a register file 213 in order to access a register with a register number larger only by one than a register number specified by a priority encoder part 214. Said function can be attained by allowing selectors 15, 16 to select control signal line groups to which decoders 18', 20' output bit strings to be decided results or control signal line groups for outputting bit strings obtained by shifting the former signal line groups to the upper side respectively only by one bit.