Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6052037
Kind Code:
A
Abstract:
PURPOSE:To form the dielectric isolation of the whole adjacent element through the CVD of an epitaxial-film in an insulating layer by adopting the isolation of a groove section in the lateral direction formed by etching an oxidation layer in approximately several micrometer. CONSTITUTION:A first insulating layer 130 is formed on a semiconductor substrate 100, and one part of the first insulating layer 130 is peeled in order to shape a specific insulating region. A semiconductor layer 150 is formed in the insulating region 130 in order to shape a substantially flat surface approximately running parallel with the surface of the semiconductor substrate 100. One part of the semiconductor layer in the insulating region 130 is peeled in order to expose some section of the top surface of the first insulating layer 130 and form groove sections 151, 152 in the semiconductor layer 150. Second insulating layers 160 are formed on the wall surfaces of the groove sections 151, 152, and residual sections of the groove sections are buried with a solid material.
Inventors:
SEODOORU AI KAMINZU
DONARUDO AARU BURATSUDOBARII
KURIFUOODO AI DOROOREI
DONARUDO AARU BURATSUDOBARII
KURIFUOODO AI DOROOREI
Application Number:
JP16724584A
Publication Date:
March 23, 1985
Filing Date:
August 09, 1984
Export Citation:
Assignee:
HEWLETT PACKARD YOKOGAWA
International Classes:
H01L27/08; H01L21/20; H01L21/205; H01L21/76; H01L21/762; H01L21/763; H01L29/78; H01L29/786; (IPC1-7): H01L21/20; H01L27/08
Domestic Patent References:
| JPS56155547A | 1981-12-01 |
Attorney, Agent or Firm:
Hasegawa Tsugio