Title:
PREPARATION OF MULTI WIRING LAYER STRUCTURE
Document Type and Number:
Japanese Patent JPS5843537
Kind Code:
A
Abstract:
PURPOSE:To obtain a multi wiring layer structure depositing a minute and distortion-free insulating layer by coating a silicon copolymer or silicon resin composition layer between metal wirings and/or on the upper most metal wiring layer and by baking such resin composition layer. CONSTITUTION:An RSiX3 (wherein, R is a monovalent organic group, X is a halogen, hydrogen or alkoxi group), SiX4 and R2SiX2 are used as initiation monomers. The silicon copolymer including the RSiX3 of 40mol% or more or the silicon resin composition layer including the RSiX3 of 40mol% or more as the monomer unit is coated between metal wiring layers and/or on the upper most metal wiring layer. Then, such resin composition layer is baked for 20- 60min at a temperature of 450 deg.C or higher under oxygen atmosphere. Thereby, a minute and distortion-free insulating layer can be formed. Accordingly, an electronic device providing the highly reliable multi wiring layer structure can be obtained.
Inventors:
TAKEDA SHIROU
USUI MAKOTO
NAKAJIMA MINORU
USUI MAKOTO
NAKAJIMA MINORU
Application Number:
JP14085681A
Publication Date:
March 14, 1983
Filing Date:
September 09, 1981
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H01L21/768; H01L21/31; H01L21/47; H01L23/522; (IPC1-7): H01L21/47
Attorney, Agent or Firm:
Aoki Akira