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Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6037776
Kind Code:
A
Abstract:

PURPOSE: To enable the high integration and high speed action of the LSI composed of an MOSFET by a method wherein a high melting point metal is deposited on the surface of a single crystal Si or a polycrystalline Si and thereafter heat- treated at a high temperature in a short time.

CONSTITUTION: An element insolation SiO2, a gate oxide film 3 and a poly Si gate electrode 4 are formed on an Si substrate 1. Next, a diffused layer 8 is formed after an SiO2 film is formed on the surface 5 of the poly Si and its side surface 6. Then, the high melting point metal 9 is deposited on the surface of the substrate 1. Thereafter, a silicide 10 is selectively formed only on the poly Si surface and the diffused layer surface by heat treatment at a high temperature in a short time by means of a tungsten-halogen lamp. Since heat treatment is carried out in a short time, only the surface of Si turns silicified. Therefore, the selective etching removal only of the high melting point metal is enabled, and then a silicide region 10 remains. Thereby, the gate electrode and the diffused layer become low in resistance, thus enabling high speed action. Besides, the junction depth of the diffused layer can be made shallow, and accordingly it becomes possible to reduce the MOSFET in size.


Inventors:
KATOU TATSUMASA
Application Number:
JP14701383A
Publication Date:
February 27, 1985
Filing Date:
August 10, 1983
Export Citation:
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Assignee:
SUWA SEIKOSHA KK
International Classes:
H01L21/336; H01L29/41; H01L29/423; H01L29/78; H01L29/786; (IPC1-7): H01L29/60
Domestic Patent References:
JPS5799775A1982-06-21
JPS55125649A1980-09-27
JPS56100412A1981-08-12
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)



 
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