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Patent Searching and Data


Title:
VIDEO COPY TIMING SIGNAL GENERATING CIRCUIT
Document Type and Number:
Japanese Patent JPS5890877
Kind Code:
A
Abstract:

PURPOSE: To avoid shift of the position of timing in sampling a picture signal, by generating a video copy timing based on a horizontal synchronizing signal at the 2nd and succeeding, after a vertial synchronizing signal.

CONSTITUTION: A negative synchronizing signal S1 including equivalent pulse inputted from a terminal T1 is integrated at a circuit comprising a resistor R1 and a capacitor C1 and outputted to a counter of a microcomputer and a clear terminal CLR of a flip-flop 12 via a transistor (TR)TR1 and an inverter 11. Further, the synchronizing signal S1 is amplified at a TR2, integrated at a resistor R5 and a capacitor C2 and inputted to a switching signal for a TR3. The output of the TR3 is sequentially inputted to flip-flop circuits 12, 13, 14 and a video copy timing signal based on the 2nd and succeeding horizontal synchronizing signals after the vertical synchronizing signal of the composite sunchronizing signal S1 indlucing equivalent pulses is outputted from an NAND circuit 15.


Inventors:
INOUE YUUJI
Application Number:
JP18777681A
Publication Date:
May 30, 1983
Filing Date:
November 25, 1981
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H04N5/76; G06F3/153; H04N5/93; (IPC1-7): H04N5/76
Attorney, Agent or Firm:
Wakabayashi Tadashi