PURPOSE: To store trace data which is effective at necessary sample timing in the investigation of the causes of trouble by employing a shift data memory as a trace memory.

CONSTITUTION: The execution address of an instruction is stored in an instruction execution address register 1, and plural instruction addresses are set previously in an instruction address register 2. An address comparing circuit 3 compares the contents of the instruction execution address register 1 with those of the instruction address register 2. The shift data memory 4 is stored with shift data sent out through a shift path 52. A shift memory address register 5 indicates an address of the shift data memory 4. A main control circuit 6 selects one of plural instruction addresses to be compared next when the address comparing circuit 3 detects coincidence, and store shift data in the shift data memory 4 through a shift path together with the selected address to update the contents of the shift memory address register 5.