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Title:
BURST SIGNAL DETECTING CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPS6085652
Kind Code:
A
Abstract:

PURPOSE: To attain initial acquisition at a low C/N state and to reduce a pre- word of a burst signal by narrowing a band of a band limit filter and setting a generation time of a control signal to the end time in the process of synchronism locking for carrier regeneration of the next burst signal.

CONSTITUTION: The effect of noise on an input burst signal (Fig. a) to a band limit filter 22 is decreased by narrowing the band and an output of a burst signal detection circuit is Td' which is delayed further than a conventional delay time Td. On the other hand, the generation time of a control signal 19 adjusts a preset value of a preset counter 27 and gives a delay by Tf-Td+Tc time. As a result, the control signal 19 is generated at a position delayed by the time Tc from a head time of the next burst signal and a pre-word of carrier regeneration is reduced to the Tc. Since the effect of noise is decreased as mentioned above and the frame period Tf frequency stability is high in a time division multiple address (TDMA) system, the generation time of the control signal 19 is stabilized and the initial acquisition at a low C/N state is attained.


Inventors:
SHIYOUMURA TATSUROU
MORIKURA MASAHIRO
KAZEKAMI YUTAKA
Application Number:
JP19394683A
Publication Date:
May 15, 1985
Filing Date:
October 17, 1983
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
MITSUBISHI ELECTRIC CORP
International Classes:
H04L27/22; H04L27/227; (IPC1-7): H04L27/22
Attorney, Agent or Firm:
Masuo Oiwa