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Title:
RECOGNIZING SYSTEM OF LOGICAL CIRCUIT DIAGRAM
Document Type and Number:
Japanese Patent JPS6049476
Kind Code:
A
Abstract:

PURPOSE: To avoid recognizing mistakenly a character as a part of a segment by recognizing automatically a logical circuit diagram after separating correctly the segments from characters in said circuit diagram which is drawn on the basis of a prescribed lattice axis.

CONSTITUTION: A lattice point, i.e., a terminal point A which has a code only in one of four directions of a lattice point label code is detected. Then the stroke length (number of lattice points) between the point A and a terminal point set under a connection state or a branch point B is obtained. Then the number of lattice points having an ambiguous flag (mark ⊗) at least at one of two lattice points at both sides of the stroke is obtained. In case the stroke length is smaller than the prescribed value and the number of lattice points having ambiguous flags of the label code of a lattice point adjacent to said stroke is larger than the prescribed threshold value, the relevant stroke is regarded as a character part. As a result, the 4-direction code is dropped out among all lattice point level codes of the stroke to set the ambiguous flags.


Inventors:
HATSUZAKI JIYUNJI
KOIZUMI JIYUNICHI
OSADA SHIGEMI
Application Number:
JP15821783A
Publication Date:
March 18, 1985
Filing Date:
August 30, 1983
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F17/50; G06K9/00; G06T7/00; G06T7/60; (IPC1-7): G06K9/00
Attorney, Agent or Firm:
Furuya Fumio



 
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